Fakhrul Zaman Rokhani received the Ph.D. degree from the University of Minnesota, USA. He is an associate professor at Universiti Putra Malaysia and the deputy director of the System-on-Chip Research Center of Excellence. He was with Intel Penang Design Center, ST Microelectronics, Huawei Technologies, and Western Digital as a visiting professor, a visiting scholar at the ASIC & Systems State Key Lab at Fudan University, and a visiting professor at several other universities. His current research interests include low-power/energy-efficient system-on-chip (SoC) design and automation, IoT system integration, and sensors for food quality applications. In 2023, he co-founded a startup company focusing on low-power IPs. He serves as Vice President of Education and Communications for IEEE CAS Society (2023-2026), and on the steering committee of IEEE Future Direction - Global Semiconductors and Advanced AI-Augmented Hardware Technologies and Systems (HART) at IEEE. On the publication front, he has been contributing as a Senior Associate Editor of TCAS-I, Associate Editor of the CAS Society newsletter, Guest Editor of TCAS-I and TCAS-II, and Technical Program/Publication Chair/Track chairs/Embedded Workshop Chair of several IEEE CASS conferences.

Speech Title: From Reliable Bits to Reliable Intelligence: Energy-Efficient and Reliable Networks-on-Chip for AI

Abstract: AI and machine-learning systems increasingly rely on complex on-chip communication to connect processing elements, memories, accelerators, and chiplets. As these systems scale, communication energy and reliability are becoming important design challenges, particularly under aggressive technology scaling, higher integration density, and increasingly demanding workloads.

This keynote will discuss the evolution of energy-efficient and reliable Networks-on-Chip (NoCs) and their growing importance in AI and machine-learning computing platforms. A central theme is that AI workloads do not necessarily require uniform protection of all communicated information. Looking beyond conventional bit-perfect communication, the talk will highlight emerging directions in workload-aware and resilience-aware NoC design, where reliability can be dynamically managed alongside energy, performance, and application requirements. It will conclude with a research outlook toward scalable and self-adaptive communication fabrics for the next generation of intelligent computing systems.

Dr. Royannez brings over three decades of international experience, having worked across the United States, France, Germany, Finland, and Singapore. Throughout his career, he has held key roles at leading semiconductor companies including Siemens, Infineon, Texas Instruments, ST-Ericsson, and Intel. He has led research and development teams across multiple global locations, including Singapore, France, Beijing, and Bangalore, driving innovation in advanced semiconductor technologies. His expertise spans all aspects of System-on-Chip (SoC) design, with a particular focus on ultra-low-power digital design, for which he holds several patents. Dr. Royannez is a Senior Member of the IEEE and earned his Ph.D. in Electrical Engineering and Computer Science from Universite Pierre et Marie Curie.

Speech Title: Radiation-Hardened Embedded Memory Architectures for Next-Generation Space Payloads

Abstract: As new AI applications are considering potential deployment in deep-space and low-Earth orbit, the need for Rad-hard memory architectures and solution becomes one of the main challege to tackle to enable this new field of research and developement. We will first review the state of the art solutions from the perspective of transistor and circuit level solutions using bulk CMOS, Silicon-on-Insulator (SOI), and sub-16nm FinFET technologies. We will then consider various system level architectures and trade-offs of modern error-correcting code schemes and dual-interlocked storage cell. Finally we will examin what Package level solution, including 2.5D and 3D heterogeneous chiplet integration can bring to sustain multi-year mission lifetimes in harsh cosmic ray and solar particle environments.

Zhe Liu received the B.S. and M.S. degrees from Zhejiang University (ZJU), Hangzhou, China, in 2014 and 2017, respectively, and the Ph.D. degree from Nanyang Technological University (NTU), Singapore, in 2022. From 2023 to 2025, she was with the Centre for Integrated Circuits and Systems (CICS), NTU, where she worked as a Research Fellow. She is currently a Full Professor with the School of Microelectronics, Tianjin University (TJU), Tianjin, China.
Her research interests include the design of radio frequency (RF) integrated circuits such as low-power phase-locked loops, delay-locked loops, and transceivers for high-speed wireless communications. Dr. Liu was a recipient of the 2022 Women in Engineering, Science, and Technology Development Grant, the 2023 Best Thesis Award from NTU, the 2022 IEEE CASS Student Travel Grant, and the 2023 IEEE SSCS Predoctoral Achievement Award.

Speech Title: TBD

Chun Wang (Member, IEEE) received the B.E. degree from the University of Electronic Science and Technology of China, Chengdu, China, in 2015, the M.E. degree from Zhejiang University, Hangzhou, China, in 2018, and the Ph.D. degree from the Department of Electrical and Electronic Engineering, Tokyo Institute of Technology, Tokyo, Japan, in 2024. From 2024 to 2026, he was a Post-doctoral Researcher at the Institute of Science Tokyo, Japan. Since July 2026, he has been a Researcher with Zhejiang University, China, focusing on millimeter-wave and terahertz front-end and system design. His current research interests include CMOS RF/Sub-THz/THz transceivers, phased-array transceivers, device modeling, and wireless/satellite communication systems. Dr. Wang is a recipient of the 2024 IEEE EDS Japan Joint Chapter Student Award and the 2025 Seiichi Tejima Research Award.

Speech Title: Terahertz Phased-Array Transceiver Design in 65nm CMOS

Dr. Hailin Peng is a full professor at Peking University, China. He received his B.S. in chemistry from Jilin University in 2000, and a PhD in physical chemistry from Peking University in 2005. He pursued postdoctoral studies at Stanford University during 2005-2009. His current research interests focus on controlled growth, chemical modifications, heterostructures and functional devices of high-mobility 2D materials, such as graphene and layered bismuth oxychalcogenides (Bi2O2Se, Bi2SeO5). He has issued 90 patents and published more than 300 papers including Science, Nature, Nature Materials, Nature Chemistry, Nature Nanotechnology, Nature Electronics, Nature Methods, etc. He received many awards, including New Cornerstone Investigator (2025), Youqi Tang award (2025), Distinguished Professor Chang Jiang Scholarship (2022), XPLORER PRIZE (2021), Young Scientist Award - Ministry of Education of China (2018), "Ten thousand plan" - National high level talents special support plan (2018), the second prize of National Natural Science Award of China (2017), SMALL Young Innovator Award (2017), the MRS Singapore ICON-2DMAT Young Scientist Award (2017), and National Science Fund for Distinguished Young Scholars of China (2015). He is currently the Dean of the College of Chemical and Molecular Engineering of Peking University, the Director of the Center for Nanoscience & technology of Peking University, the deputy dean of the Beijing Graphene Institute (BGI), and the deputy director of the National Nanoscience Center.

Speech Title: 2D Bismuth Oxyselenide for Future Electronics

Abstract: Our recent studies will be discussed, focusing on the controlled synthesis and interfacial modulation of high-mobility 2D semiconductors such as layered bismuth oxyselenide (Bi2O2Se) and its van der Waals native oxide Bi2SeO5, along with their electronic and optoelectronic properties. In particular, we report on chemical vapor deposition (CVD) growth and molecular beam epitaxy (MBE) of large-area layered Bi2O2Se single crystals, which exhibit excellent air stability, moderate bandgap values of ~0.8 eV, a low electron effective mass of ~0.14 m0, and ultrahigh Hall mobility. Wafer-scale 2D Bi2O2Se crystals can be grown on the industrial substrate such as R-plane sapphire and fabricated into high-performance field-effect transistors. Atomically thin high-k native oxide bismuth selenite (both alfa-phase and beta-phase Bi2SeO5) can be conformally formed on the underlying 2D Bi2O2Se via layer-by-layer oxidation. Large-area layered Bi2SeO5 films can be facilely synthesized and used as ultrathin ferroelectric oxides, high-k dielectrics, and as encapsulation layers for 2D electronics. Using an epitaxial high-k native-oxide gate, the first 2D Bi2O2Se fin field-effect transistor (2D FinFET), 2D gate-all-around (GAA) logic, and novel reconfigurable logic-in-memory circuits based on 2D ferroelectric FETs (FeFETs) - operate at sub-1 V - were recently developed and integrated, holding great promise for future high-performance device applications.

Dong Linxi, male, born in 1976, originally from Shouguang, Shandong, holds a PhD from Zhejiang University. He is a second-level professor and doctoral advisor at the School of Electronic Information, Hangzhou Dianzi University, and a national leading talent. His main research areas include microelectronics and solid-state electronics, as well as circuits and systems, covering MEMS sensors, flexible wearable sensing integration technology, industrial IoT front-end signal acquisition technology, and sensor integrated circuit design. He has led 5 national projects and 9 provincial and ministerial projects, holds 8 national invention patents as the first inventor, and has published over 100 papers as the first or corresponding author in journals such as IEEE Transactions on Industrial Informatics. He currently serves as a director of the Zhejiang Vibration Engineering Society, a member of the Micro-Nano Manufacturing Technology Branch of the Chinese Mechanical Engineering Society, and a director of the Micro-Nano Manufacturing and Equipment Branch of the Chinese Society for Micro-Nano Technology. He has been recognized as a leading talent in scientific and technological innovation in Zhejiang Province and as a first-tier talent in Zhejiang's 151 Talent Program.

Speech Title: A Monolithic CMOS MEMS Thermopile Infrared Sensor: Design, Thermal Interference Modeling, and Validation

Abstract: We present a monolithically integrated CMOS-MEMS thermopile infrared sensor and addresses a problem common to such architectures. The sensor is fabricated in a standard 0.18 um 1P5M CMOS process with a post-CMOS-released MEMS membrane, integrating 24 series-connected p-polysilicon/aluminum thermocouple pairs and a complete on-chip readout chain with a 24-bit analog-to-digital converter, with the calibration model attaining coefficients of determination of 0.997 and 0.999. Self-heating from the ASIC propagates laterally through the shared silicon substrate to the thermopile cold junction, perturbing its temperature and degrading sensing accuracy; this interference is experimentally confirmed, with a steady temperature rise on the order of 0.3 C observed after packaging. Since this interference depends on layout dimensions, heat-sinking conditions, and operating frequency, finite-element simulation alone reveals neither the underlying scaling laws nor avoids rebuilding the model for every layout revision. To address this, a closed-form analytical model of the on-chip thermal interference is derived from the fundamental laws of heat transfer. Validation against finite-element simulation yields a cold-junction temperature rise of 0.223 mK against 0.070 mK from simulation, both following the same modified-Bessel decay. The model is further extended to a frequency-dependent dynamic analysis, from which a critical interference frequency f_c is proposed as the boundary between the static and dynamic regimes; for the present design, f_c ~ 36 Hz, far below the kHz-level chopper and MHz-level digital clocks, with a 1 kHz attenuation of -46.0 dB versus -47.5 dB from simulation. Requiring only a few device parameters to predict both the magnitude and the frequency characteristics of the interference, the proposed model offers general guidance for the design of monolithically integrated thermoelectric sensors.

Yuhao Zhang is currently a Full Professor with the Department of Electrical and Computer Engineering of the University of Hong Kong (HKU). He also serves as the Associate Director of the HKU Centre for Advanced Semiconductors and Integrated Circuits. Before joining HKU, he was the Shirish S. Sathaye Associate Professor with Virginia Tech, leading the power semiconductor research at the Center for Power Electronics Systems, the largest academic research center in power electronics in the U.S. He received his Ph. D. and S. M., both in electrical engineering from Massachusetts Institute of Technology (MIT) in 2017 and 2013, respectively. He has authored over 200 papers (including 7 Nature/Science-series papers, 21 IEDM papers, 20+ T-PEL papers as the corresponding author) and 2 book chapters and holds 8 granted U. S. patents. He is a co-author of over 10 highlight/feature/prize papers. His work has been cited over 13,000 times with a h-index of 59 and been widely covered by Nature Electronics, Semiconductor Today, Compound Semiconductors, EE Times, etc. over 100 times.
He currently serves as the Chair of the Power Devices and ICs Technical Committee of the IEEE Electron Device Society, an Associate Editor-in-Chief for IEEE Electron Device Letters, an Associate Editor for IEEE Transactions on Power Electronics, and the TPC member of many conferences (e.g., IEDM, APEC, WiPDA). He received the MIT Microsystems Technology Laboratories Doctoral Dissertation Award, two IEEE George Smith Awards (best paper award of the year in IEEE Electron Device Letters), four Technical Highlights of IEEE International Electron Devices Meeting (IEDM), IEEE William M. Portnoy 1st Prize Paper Award, the National Science Foundation CAREER Award, the Outstanding New Assistant Professor Award and Faculty Fellow Award of Virginia Tech, the Office of Naval Research Young Investigator Award, the Compound Semiconductor Week Young Scientist Award, and the He Xiang Jian Young Scientist Award. His students received the Ph.D. Thesis Talk Award of the IEEE Power Electronics Society and several APEC Best Presentation Awards.

Speech Title: TBD

Prof. Qianqian Huang is a Full Professor with Tenure in the School of Integrated Circuits at Peking University. Her research interests are in the area of emerging low-power devices for diverse applications, in particular tunnel devices and ferroelectric devices. She has authored/co-authored more than 100 technical papers in international journals and conferences and held more than 70 granted patents. She is the recipient of Chang Jiang Scholar (2023), the Chinese Young Women in Science Award (2022), Xplorer Prize (2020), IEEE EDS Early Career Award (2019), etc.

Speech Title: TBD

Xiaolei Wang is Professor of Institute of Microelectronics, Chinese Academy of Sciences (IMECAS). He received his Bachelor's degree from Northwestern Polytechnical University in 2008 and his Doctoral degree from the Institute of Microelectronics, Chinese Academy of Sciences in 2013. He has been working at the institute ever since. His research focuses on hafnium-based silicon-channel FeFET devices. He has published more than 40 papers as the first or corresponding author in journals including IEEE Electron Device Letters (IEEE EDL), IEEE Transactions on Electron Devices (IEEE TED), Applied Physics Letters (APL) and Journal of Applied Physics (JAP).

Speech Title: TBD

Recipient of the National Science Fund for Distinguished Young Scholars, currently serves as Dean of the School of Electronic Science and Engineering and the School of Integrated Circuits at Xiamen University. His long-term research focuses on novel memory materials, devices, circuits and architectures. Previously, he worked as a senior technical expert of Emerging Memory at HiSilicon. He has been honored with multiple prestigious awards, including the Outstanding Science and Technology Achievement Award of the Chinese Academy of Sciences and the Huawei Olympus Pioneer Award.

Speech Title: TBD

Dr. Guilei Wang, Professor, Vice President of Beijing Superstring Academy of Memory Technology. His research interests focus on semiconductor processes, device fabrication, and 3D integration for the IC industry. He has published over 290 SCI and EI research papers (as of May 2026), including Nature Communications, Nano Letters, Physical Review Letters/A/B/Materials, IEEE EDL, IEEE TED, IMW, IEDM and VLSI. He has authored and co-authored more than 173 Chinese granted invention patents, as well as 20 patents in the United States and Europe.

Speech Title: TBD

Chuan Liu is Professor at Sun Yat-sen University and Deputy Dean of the School of Electronic and Information Engineering. He earned his bachelor's and doctoral degrees from Tsinghua University and the University of Cambridge, UK, respectively. He has worked at the National Institute for Materials Science (NIMS) in Japan and Dongguk University in South Korea. His research focuses on semiconductor materials and principles, thin-film device fabrication, and circuits. His papers have been published in journals such as Nature Electronics and Science Advances. He serves as an editorial board member and deputy editor for Journal Semiconductor Science and Technology, as well as Executive Chair for the 13th International Thin-Film Transistor Conference.

Speech Title: TBD